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| Profil : |
Engineer - minimum
2 years experience
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Role
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The position is an Integration activity. It consists of assembling IPs from
different teams into a SoC. The integrator builds the top level RTL based on
the chip functional specification and the IP specifications. He also
implements the power management techniques.
The integrator also owns some chip level IPs.
- Responsible for the chip RTL: interface with top level verification
team, the synthesis & prototyping teams, the BackEnd teams (ECOs…)
Responsible for the RTL quality: static checks, coding guidelines
Repsonsible for the Layout netlist functionality: RTL2G and G2G equivalence
checking
Responsible for the Power Management safety (RTL & Gate levels): static
checkers & simulations
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| Skills :
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| Disponibility : |
Asap, or after your noticed
period time |
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Place : | Sophia-Antipolis
- This is in South of France. Nice airport.
We will help you in finding
place to leave with our professionnal real estate
partners. |
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| Contrat : | Permanent
or other type as freelance. |
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| Salary : | According
to educational qualificiations and experience.
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If
this offer interests you, send a letter in support of
your application and your CV at : contact@axylog.com
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